E-Trim™ Technology


Floating-gate trimming saves backend testing costs

Floating gate trimming utilizes a CMOS transistor or EPAD (Electrically Programmable Analog Device) with a floating gate of polysilicon embedded in the device gate oxide. In linear components such as op-amps, the EPAD is part of the op-amp chip and adds virtually no additional cost or complexity to manufacture. Trimming the op-amp input offset voltage (Vos) for example is accomplished by injecting a charge of "hot" electrons with sufficient energy to enter the oxide and on into the floating gate structure. Once inside the floating gate, the electrons are trapped and stored indefinitely as a nonvolatile charge storage, which remains even after the power is removed.
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